a) Field of the Invention
The present invention relates to a crystal growth technique, and more particularly to a method of growing group III-V compound semiconductor crystal on an Si substrate.
b) Description of the Related Art
Group III-V compound semiconductor devices have been developed for use as optoelectronic devices, high speed devices, and the like. Semiinsulating GaAs or InP substrates are often used as the substrates of group III-V compound semiconductor devices. Although such substrates physically support semiconductor devices, they have no electrical function other than as an electrical insulating element.
Group III-V compound semiconductor substrates such as GaAs substrates are more expensive and brittle and fragile than Si substrates, requiring much care in handling them. Si substrates are generally superior to compound semiconductor substrates in that the former is light in weight (less dense), high in thermal conductivity, low in price, high in mechanical strength, easy to make a large diameter wafer, and so on, except that it has a low electron mobility.
In order for compound semiconductor devices to positively use such advantages of Si substrates, techniques regarding GaAs on an Si substrate (GaAs on Si), for example, have drawn attention. However, the coefficient of thermal expansion of GaAs is about three times as that of Si, and GaAs has a zinc blend structure whose crystal system is different from the diamond structure of Si. Because of these different points, the technique regarding a GaAs crystal on an Si substrate has many problems to be solved.
When a GaAs layer is grown on an Si substrate at a temperature of about 600.degree. to 700.degree. C. and thereafter cooled to the room temperature, a large thermal stress will be generated because of a difference between the coefficients of thermal expansion. This thermal stress generates lattice defects in the GaAs crystal. The density of lattice defects reaches sometimes to 10.sup.6 to 10.sup.9 cm.sup.-2 although it depends on the growth process. These lattice defects deteriorate the properties of manufactured semiconductor devices.
GaAs contracts greater than Si when the temperature is lowered from the growth temperature to the room temperature, so that the GaAs/Si (GaAs on Si) substrate warps upward. As the upward warpage of a wafer becomes greater, the diameter of the substrate becomes larger. The warpage of a wafer degrades the exposure precision of photolithography.
The crystal growth of a GaAs layer on an Si substrate is not uniform, forming a number of irregularities on the growth surface. For example, a number of irregularities of about 2000 nm in in-plane directions and about 20 nm in height are formed on the surface of a GaAs layer having a film thickness of 3 .mu.m.
Such a poor surface structure (poor morphology) may hinder the formation of fine semiconductor elements. In order to solve this problem, various approaches have been studied heretofore. Relevant techniques will be described briefly in the following.
[2-Step Growth Method]
This technique provides a method of growing a monocrystalline GaAs layer on an Si substrate by two steps.
An Si substrate is used which has a surface tilted by about 3 degrees from the (100) surface in the &lt;011&gt; direction. The Si substrate having such a surface is called hereinafter a misoriented Si substrate.
A clean Si surface is first exposed. An amorphous GaAs layer is grown on the Si surface at a low temperature of about 500.degree. C. by an MOCVD method.
Thereafter, the amorphous GaAs layer grown at the low temperature is crystallized into a monocrystalline layer by heating it to about 600.degree. C. On the monocrystalline GaAs layer, a desired group III-V compound semiconductor layer is grown.
[Reduction of Lattice Defects (Dislocation Densities]
The following methods are known as a method of reducing lattice defects of a GaAs crystal layer grown on an Si substrate.
(1) Lattice defects (dislocations) to be caused by thermal stress in a GaAs layer due to a difference between the coefficients of thermal expansion, are forcibly bent and moved in the lateral direction of the GaAs layer, by raising and lowering the temperature during the growth process of the GaAs layer. PA1 (2) A layer having a different lattice constant and generating stress in the lateral direction is inserted during the growth of a GaAs layer. For example, an InGaAs layer is used as such a layer. Dislocations generated in the GaAs layer are forcibly bent and moved in the lateral direction by the stress caused by a difference between the lattice constants.
[Improvement of Morphology]
A buffer layer is grown on a silicon substrate at a low temperature, the buffer layer being made of material having a large coupling or bonding energy to silicon, such as AlAs and AlP. Presence of such material on the surface of silicon restricts the surface diffusion (migration) of atoms attached to the surface of the buffer layer during the later process of growing compound semiconductor such as GaAs, thereby suppressing the formation of crystal islands.
In addition to the above-described methods, other approaches have been studied, including annealing after the selective growth or semiconductor crystal growth.
It is very difficult to manufacture a GaAs/Si substrate having a good morphology so far as the present inventor knows. It is very difficult for the above-described two-step growth method to stop the formation of irregularities (steps) in the order of 10 nm to 20 nm.